[Cisc662010_fa08] An interrupt or exception is imprecise if ...

[Michela Taufer]

Dear All,

Last time we discussed in class when an interrupt or exception is  
precise and we saw this definition:

An interrupt or exception is considered precise if there is a single  
instruction (or interrupt point) for which:
- All instructions before that have committed their state
- No following instructions (including the interrupting instruction)  
have modified any state.

Alternatively, to define the same concept we can also explain when an  
interrupt or exception is NOT precise, e.g.:

An interrupt or exception is imprecise if the processor state when an  
exception is raised does not look exactly as if the instructions were  
executed sequentially in strict program order:
- The pipeline may have already completed instructions that are later  
in program order than the instruction causing the exception (we may  
have div.d raising an exception but have sub.d completed already).
- The pipeline may have not yet completed some instructions that are  
earlier in program order than the instruction causing the exception.


MT

__________________________________________________

Michela Taufer

Assistant Professor
Department of Computer and Information Sciences
University of Delaware

Phone: (302) 831 0071
Fax: (302) 831 8458
E-Mail: taufer at acm.org
URL: http://www.cis.udel.edu/~taufer
GCLab: http://gcl.cis.udel.edu
D at H: http://docking.cis.udel.edu

__________________________________________________







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